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256MB - 32Mx72 SDRAM UNBUFFERED
FEATURES
PC100 and PC133 Burst Mode Operation Auto and Self Refresh capability LVTTL compatible inputs and outputs Serial Presence Detect with EEPROM Fully synchronous: All signals are registered on the positive edge of the system clock Programmable Burst Lengths: 1, 2, 4, 8 or Full Page 3.3V 0.3V Power Supply JEDEC standard 168 Pin DIMM
W3DG7237V-D2
PRELIMINARY*
DESCRIPTION
The W3DG7237V is a 32Mx72 synchronous DRAM module which consists of nine 32Mx8 SDRAM components in TSOP II package, and one 2Kb EEPROM in an 8 pin TSSOP package for Serial Presence Detect which are mounted on a 168 pin DIMM multilayer FR4 Substrate.
* This product is under development, is not qualified or characterized and is subject to change without notice.
PIN CONFIGURATIONS (FRONT SIDE/BACK SIDE)
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Front VSS DQ0 DQ1 DQ2 DQ3 VCC DQ4 DQ5 DQ6 DQ7 DQ8 VSS DQ9 DQ10 DQ11 DQ12 DQ13 VCC DQ14 DQ15 CB0 CB1 Vss NC NC VCC WE# DQM0 Pin 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 Front DQM1 CS0# DNU VSS A0 A2 A4 A6 A8 A10/AP BA1 VCC VCC CK0 VSS DNU CS2# DQM2 DQM3 DNU VCC NC NC CB2 CB3 VSS DQ16 DQ17 Pin 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 Front DQ18 DQ19 VCC DQ20 NC *VREF *CKE1 VSS DQ21 DQ22 DQ23 VSS DQ24 DQ25 DQ26 DQ27 VCC DQ28 DQ29 DQ30 DQ31 VSS CLK2 NC NC **SDA **SCL VCC Pin 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 Back VSS DQ32 DQ33 DQ34 DQ35 VCC DQ36 DQ37 DQ38 DQ39 DQ40 VSS DQ41 DQ42 DQ43 DQ44 DQ45 VCC DQ46 DQ47 CB4 CB5 VSS NC NC VCC CAS# DQM4 Pin 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 Back DQM5 *CS1# RAS# VSS A1 A3 A5 A7 A9 BA0 A11 VCC *CLK1 A12 VSS CKE0 *CS3# DQM6 DQM7 *A13 VCC NC NC CB6 CB7 VSS DQ48 DQ49 Pin 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 Back DQ50 DQ51 VCC DQ52 NC *VREF NC VSS DQ53 DQ54 DQ55 VSS DQ56 DQ57 DQ58 DQ59 VCC DQ60 DQ61 DQ62 DQ63 VSS *CLK3 NC **SA0 **SA1 **SA2 VCC
PIN NAMES
A0 - A12 BA0-1 DQ0-63 CB0-7 CLK0,CLK2 CKE0 CS0#,CS2# RAS# CAS# WE# DQM0-7 VCC VSS *VREF SDA SCL SA0-2 DNU NC Address input (Multiplexed) Select Bank Data Input/Output Check bit (Data-in/data-out) Clock input Clock Enable input Chip select Input Row Address Strobe Column Address Strobe Write Enable DQM Power Supply (3.3V) Ground Power supply for reference Serial data I/O Serial clock Address in EEPROM Do not use No Connect
* These pins are not used in this module. ** These pins should be NC in the system which does not support SPD.
June 2004 Rev. 0
1
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FUNCTIONAL BLOCK DIAGRAM
CS0# DQM0
W3DG7237V-D2
PRELIMINARY
DQM4
DQM
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQM1 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7
CS#
U0 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQM5
DQM
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7
CS#
U5
DQM
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7
CS#
U1 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQM6
DQM
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7
CS#
U6
DQM
CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7 CS2# DQM2 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7
CS#
U2
DQM
DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQM7 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7
CS#
U7
DQM
DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQM3 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7
CS#
Serial PD
DQM
DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7
CS#
U8
U3
DQM
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7
CS#
U4
SCL 47K SA0 SA1 SA2 WP A0 SDA A1 A2
A0 ~ A12, BA0 & 1 RAS# CAS# WE# CKE0 10 DQn VCC
SDRAM U0 ~ U8
* Clock Wiring
SDRAM U0 ~ U8
Clock Input SDRAMS 4 SDRAMS 5 SDRAMS
SDRAM U0 ~ U8 SDRAM U0 ~ U8 SDRAM U0 ~ U8
CLK0 CLK2
Every DQpin of SDRAM 10 CLK1/3 One 0.1uF and one 0.22 uF Cap. per each SDRAM To all SDRAMs 10pF
Vss
June 2004 Rev. 0
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ABSOLUTE MAXIMUM RATINGS
Parameter Voltage on any pin relative to VSS Voltage on VCC supply relative to VSS Storage Temperature Power Dissipation Short Circuit Current Symbol VIN, VOUT VCC, VCCQ TSTG PD IOS Value -1.0 ~ 4.6 -1.0 ~ 4.6 -55 ~ +150 9 50
W3DG7237V-D2
PRELIMINARY
Units V V C mA
Note: Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to recommended operating condition. Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
RECOMMENDED DC OPERATING CONDITIONS
Voltage Referenced to: VSS = 0V, 0C TA 70
Parameter Supply Voltage Input High Voltage Input Low Voltage Output High Voltage Output Low Voltage Input Leakage Current Symbol VCC VIH VIL VOH VOL ILI Min 3.0 2.0 -0.3 2.4 -- -10 Typ 3.3 3.0 -- -- -- -- Max 3.6 VCCQ+0.3 0.8 -- 0.4 10 Unit V V V V V A 1 2 IOH= -2mA IOL= -2mA 3 Note
Note: 1. VIH (max)= 5.6V AC. The overshoot voltage duration is 3ns. 2. VIL (min)= -2.0V AC. The undershoot voltage duration is 3ns. 3. Any input 0V VIN VCCQ Input leakage currents include Hi-Z output leakage for all bi-directional buffers with Tri-State outputs.
CAPACITANCE
TA = 25 C, f = 1MHz, VCC = 3.3V, VREF = 1.4V 200mV
Parameter Input Capacitance (A0-A12) Input Capacitance (RAS#,CAS#,WE#) Input Capacitance (CKE0) Input Capacitance (CLK0) Input Capacitance (CS0#,CS2#) Input Capacitance (DQM0-DQM7) Input Capacitance (BA0-BA1) Data input/output capacitance (DQ0-DQ63) Data input/output capacitance (CB0-CB7) Symbol CIN1 CIN2 CIN3 CIN4 CIN5 CIN6 CIN7 COUT COUT1 Max 40 40 40 20 24 7 40 9 9 Unit pF pF pF pF pF pF pF pF pF
June 2004 Rev. 0
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OPERATING CURRENT CHARACTERISTICS
VCC = 3.3V, 0C TA 70C
Parameters Symbol Conditions
W3DG7237V-D2
PRELIMINARY
Versions 133/100
Units
Note
Operating Current (One bank active) Standby Current in Power Down Mode Active standby in current non power-down mode
ICC1
Burst Length = 1 tRC tRC(min) IOL = 0mA CKE VIL(max), tCC = 10ns CKE VIH(min), CS VIH(min), tCC = 10ns Input signals are charged one time during 20ns Io = mA Page burst 4 Banks activated tCCD = 2CLK tRC tRC(min) CKE 0.2V
720
mA
1
ICC2 ICC3
18 225
mA mA
Operating current (Burst mode)
ICC4
900
mA
1
Refresh current Self refresh current
Notes: 1. Measured with outputs open. 2. Refresh period is 64ms.
ICC5 ICC6
1620 27
mA mA
2
June 2004 Rev. 0
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White Electronic Designs Corporation * (602) 437-1520 * www.wedc.com
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ORDERING INFORMATION
Part Number W3DG7237V10D2 W3DG7237V7D2 W3DG7237V75D2 Speed 100MHz 133MHz 133MHz CAS Latency CL=2 CL=2 CL=3 Height* 30.48 (1.20") 30.48 (1.20") 30.48 (1.20")
W3DG7237V-D2
PRELIMINARY
PACKAGE DIMENSIONS
3.05 (0.120) MAX 133.48 (5.255) MAX. 3.99 (0.157) (2X)
30.48 (1.20) MAX 17.78 (0.700) 3.99 (0.157)
11.43 (0.450) 8.88 (0.350) 24.49 (0.964)
1.98 (0.078) (2X)
36.83 (1.450) 42.19 (1.661)
6.35 (0.250) 3.18 (0.125)
54.61 (2.150)
1.27 (0.050) TYP.
1.27 0.10 (0.050 0039)
* ALL DIMENSIONS ARE IN MILLIMETERS AND (INCHES)
June 2004 Rev. 0
5
White Electronic Designs Corporation * (602) 437-1520 * www.wedc.com
White Electronic Designs
Document Title
256MB- 32Mx72 SDRAM UNBUFFERED
W3DG7237V-D2
PRELIMINARY
Revision History Rev #
Rev A Rev B Rev 0
History
Created Add "Part Number" to order info table 0.1 Updated Cap & IDD Specs 0.2 Changed status from Advanced to Preliminary
Release Date
11-6-01 11-16-02 6-04
Status
Advanced Advanced Preliminary
June 2004 Rev. 0
6
White Electronic Designs Corporation * (602) 437-1520 * www.wedc.com

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